The present invention relates to the field of integrated circuits, and more specifically to high voltage isolation circuitry for a memory integrated circuit.
Memory integrated circuits such as DRAMs, SRAMs, EPROMS, EEPROMS, and Flash memories are used in many applications such as computers, networking, and telecommunications. Consumers continue to demand greater performance in their electronic products. For example, higher speed computers will provide higher speed graphics for multimedia applications or development. Higher speed internet web servers will lead to greater on-line commerce including on-line stock trading, book sales, auctions, and grocery shopping, just to name a few example. Higher performance memory integrated circuits will improve the performance of the products in which they are incorporated.
In particular, the speed of a memory integrated circuit depends on the internal propagation delays of signals within the circuit. An array of memory cells in a memory circuit is typically organized by rows and columns. By providing an address to the row decoders, a row decoder selects a particular row. A speed path propagation delay is determined in part by the time it takes for a decoder to access or drive a particular row. Furthermore, it is important that the voltages selected to interface with the array and other circuitry provides for reliable and proper operation of the integrated circuit.
As can be seen, techniques and circuitry for improving the performance of memory integrated circuits are needed.